Following the success of Workshop on introduction VLSI design and FPGA (Field Programable Gate Array) in ITB (Institut Teknologi Bandung). IEEE SSCS Indonesia chapter collaborating with PME ITB were doing the same thing in another campus beside ITB. We are organize the workshop in Universitas Diponegoro (UNDIP), Jawa tengah. The workshop was held on 16-17 sept 2016.
This workshop was opened by Munawar Agus R, ST., M.T., Ph.D as a lecturer in Electrical engineering Univeristas Diponegoro and also as Secretary in Electrical engineering Departement in Universitas Diponegoro.
After that Elvayandri muchtar, S.T., M.T. as a general secretary of sscs indonesia chapter introducing SSCS Indonesia chapte’s event to the participant. In this workshop half of the participant is lecturer from campus nearby such as Universitas Islam Sultan Agung and Universitas Dian Nuswantoro, another half were Universitas Diponegoro’s students. In Universitas Diponegoro, we are also gather 49 participants. The trainer is from PME ITB, they are Renitia Murti Rahayu, Yulian Aska, Rahmat Muttaqin and Angga Pratama Putra.
The first day of the workshop we introduce the participant to vlsi and fpga. We share about what is vlsi how to RTL design and hands on FPGA. We used altera fpga board so we also used Quartus and modelsim as IDE.
On the second day we are more concern about how to design RTL, and then wrote it into RTL code VHDL.the content is about digital filter, simple filter fir and cordic as the main course to operate gyroscope and accelerometer.
The complete information about this workshop can be seen in http://ieee-edc.stei.itb.ac.id/vlsi-workshop/