Trio Adiono, ST., MT., Ph.D.

Education
TitleSchool/UniversityMajorsGraduation Date
DoctoralTokyo Institute of Technology – JapanElectrical and Elect03/26/2002
GraduateITB – IndonesiaTeknik Elektro01/01/1996
UndergraduateITB – IndonesiaTeknik Elektro04/23/1994
Senior HighSMAN 3 – IndonesiaIPA01/01/1989
Junior HighSMPN I – Indonesia 01/01/1986
ElementarySDN 19 – Indonesia 01/01/1983
Projects
  1. Digital Signage Interaktif Berbasis NFC Untuk Aplikasi Akademis, Layanan Masyarakat, Pemerintahan dan Komersial, 2016.
  2. Sistem Komunikasi Data Jarak Jauh untuk Komunikasi Nelayan, 2016.
  3. Machine to Machine Communication (M2M) Based on Visible Light Communication (VLC), 2016.
  4. Perangkat Internet-of-Things Untuk Sistem Rumah Cerdas, 2016.
  5. The International Symposium on Intelegent signal Processing and Communication System (ISPACS 2015), 2015.
  6. Digital Signage Interaktif Berbasis NFC Untuk Aplikasi Akademis, Layanan Masyarakat, Pemerintahan dan Komersial, 2015.
  7. Perangkat Internet-of-Things Untuk Sistem Rumah Cerdas, 2015
  8. Perancangan dan Implementasi Hardware untuk Sistem Bidirectional Visible Light Communication, 2015.
  9. Rancang Bangun Perangkat Wireless Broadband Untuk Infrastruktur ICT, 2014.
  10. Pengembangan Perangkat Cerdas Berbasis WiMAX untuk Aplikasi Komunikasi Machine-to-Machine (M2M), 2013.
  11. Peranan Unit Synchronizer untuk Perangkat Portable Network Analyzer Berbiaya Murah, 2013.
  12. Rancang Bangun Perangkat Wirelless Broadband untuk Infrastruktur ICT, 2013.
  13. Rancang Bangun ECo Friendly Smart Antenna untuk 4G Wireless System, 2013.
  14. Rancang Bangun Perangkat Wireless Broadband Untuk Infrastruktur ICT, 2012.
  15. MIMO STC 2×2 Design for Mobile WiMax IEEE 802.16e, 2010.
  16. Multi Antena Sistem Chipset untuk mobile Broadband, 2010.
  17. Multi Core System on Chip for Broadband Network Processors, 2010.
  18. Multi Antena Sistem Chipset untuk Mobile Broadband Wireles Berbasis WiMax 802.16e, 2009
  19. System on Chip Design for IPTV, 2007.
  20. Multi Core System on Chip for Broadband Network Processors, 2007.
  21. Quarter Pixel Resolution Motion Estimator For H.264/MPEG-4 Video Codec, 2006.
Awards
  1. Best Paper Award, T. Adiono, M. Y. Fathany, S. Fuada, I. G. Purwanda, S. F. Anindya, “A Portable Node of Humadity and Temperature Sensor for Indoor Environment Monitoring”, The 3rd International Conference on Intelligent Green Building and Smart Grid (IGBSG), April 22-25, 2018, Yilan, Taiwan.
  2. Penerima Anugerah Ilmu Pengetahuan dan Teknologi (IPTEK) Kategori Program Kerjasama Riset Kebutuhan Produk Iptek untuk Pembangunan Jawa Barat Tahun 2017, Gubernur Jawa Barat, December 12th 2017, No : 002.6/KEP.1148.3-BKD/2017
  3. Best Researcher Award, BP3IPTEK Provinsi Jawa Barat, December 20th , 2016, Ref No: 002.6/1071/BP3IPTEK/2016.
  4. Ten Most Productive Writer in Institut Teknologi Bandung, 2016.
  5. ITB Inovation Award for the contribution of 4G-Baseband Broadband Wireless Access (BWA) Design in Indonesia. Ref no (SK): 089/SK/I1.A/KP/2015.
  6. Karya Lencana Wira Karya from Presiden Republik Indonesia. (Heroic Medal of Creation Contribution from President of Republic of Indonesia). Ketetapan Presiden Republik Indonesia No. 45/TK/Tahun 2014, Tanggal 21 Juli 2014, Jasa : Berhasil menciptakan chipset lokal untuk perangkat Broadband Wireless Access dengan komponen kandungan lokal sebesar 60% dari keseluruhan Bill of Material Perangkat BWA dalam rangka mendorong pertumbuhan industri telekomunikasi dalam negeri, sehingga perangkat telekomunikasi di Indonesia menjadi lebih murah dari produk asing.
  7. Karya Lencana Wira Satya from Presiden Republik Indonesia. (Heroic Medal of Allegiance from President of Republic of Indonesia). Keputusan Presiden Republik Indonesia No. 35/TK/Tahun 2010, Tanggal 9 Agustus 2010.
  8. Best Paper Award, Trio Adiono, Hans G. Kerkhoff, Hiroaki Kunieda, “An Infrastruktural IP for Interactive MPEG-4 SoC Functional Verification”.
  9. Technical Program Committee Award, N. Sutisna, T. Adiono, “Optimum VLSI Architecture of high performance synchronizer for WiMAX OFDMA system”, IEEJ International Analog VLSI Workshop 2011, 2-4 November 2011, Bali, Indonesia.
  10. The Tokyo Tech Indonesian Commitment Award 2011, 1st Position in Electrical Engineering, (http://commitment.ppitokodai.org/), A. A. Purwita, Trio Adiono, “An Optimized Turbo Code VLSI Architecture For LTE Using System Level Modeling And Assertion Based Verification”.
  11. The Tokyo Tech Indonesian Commitment Award 2011, 3rd Position in Electrical Engineering, (http://commitment.ppitokodai.org/), Probo Aditya N.I., Trio Adiono, “Algorithm And Architecture Design of Soft Decision Demapper for SISO DVB-T by Using Quadrant K-Best”.
  12. Supervisor of ITB Student “COLORIZER: Image Colorization on FPGA Using Aritificial Neural Network (ANN) by Applying Sliding Window Technique”, LSI Design Contest, March 9th 2018, Okinawa, Japan, Perform, Analog Deivce Award”.
  13. Supervisor of ITB Student Sedap Malam Team, “System-on-Chip Design and Implementation for Noise Cancellation System“, LSI Design Contest, March 17th 2014, Okinawa, Japan, Perform 1st Winner, Smart Info Media (SIS) Award”.
  14. Supervisor of ITB Student Team, A. Purwita, R. Haryadi, R. Mareta, E. R. Priandana, “A Hardware-Software Co-Design for A Real-Time Spectral Subtraction Based Noise Cancelation System”, SoC Design Contest, International SoC Design Conference, November 17-19, 2014, Bexco, Busan, Korea. 20 Finalist out of 191 proposals.
  15. Supervisor of ITB Student Delta Sigma Team, “Design and Implementation of Real Time Noise Cancellation System Based on Spectral Subtraction Method“, The LSI Design Contest, March 29th 2013, Okinawa, Japan, Perform Best Industrial Award”from a semiconductor magazine “Sangyo Times”.
  16. Supervisor of ITB Student Muhammads in Team (MIT), “Adaptive General Spectral Subtraction“, The LSI Design Contest, March 29th 2013, Okinawa, Japan, Perform Best FPGA Awards” which was given by Tokyo Electron Device.
  17. Supervisor of ITB Student Mozaik Team, “Configurable FFT with Folded Split-Radix and Twiddle Factor Memory Optimization“, The 15th LSI Design Contest, March 16th , 2012, Okinawa, Japan. Perform 2nd winner for the “Best FPGA Implementation Award”.
  18. Supervisor of ITB Student Bimasena Team, “A New Reformulated Simplified IBM Algorithm and Architecture for High Performance BCH Decoder, March 19th2010, The 13th LSI Design Contest in Okinawa 2010. Finalist.
  19. Supervisor of ITB Student Java Team, “Ultra Fast and Efficient BCH CoDec”, March 19th 2010, The 13th LSI Design Contest in Okinawa 2010. Finalist.
  20. Supervisor of ITB Student Genesha ANT Team, A. L. Romas, R. S. Intan P, Tyson, “Pipelined Double-Issue MIPS Processor”, March 20th, The 12th LSI Design Contest in Okinawa 2009. Perform “IEICE SIS Award”. Published in Design Wave Magazine-Japan.
  21. Supervisor of ITB Student Genesha Zaeros Team, F. Firdaus, I. Prayudi, R. H. Widialaksono, “A 1 GHz MIPS Processor Architecture with Low Flush Rate and Zero Stall”, March 20th, The 12th LSI Design Contest in Okinawa 2009. Perform “Xilinx Award”. Published in Design Wave Magazine-Japan.
  22. Asia Pacific ICT Award 2008, communication category, member of Xirka Chipset Team.
  23. Supervisor of Garuda Parahiyangan Team, “RSA Encipher Hardware Design Using Interleaved Algorithm with Dynamic Masking”, March 14th, The 11th LSI Design Contest in Okinawa 2008. Perform “IEICE SIS Award”. Published in Design Wave Magazine-Japan.
  24. Supervisor of ITB Student CREW Team, RSA HARDWARE Implemented Using Pipeline Montgomery’s Algorithm”, March 14th, The 11th LSI Design Contest in Okinawa 2008. Perform “Student LSI of the Year Award”. Published in Design Wave Magazine-Japan.
  25. Supervisor of ITB Student VR46 Team, “64Point Fast Fourier Transform Circuit Implemented Using Radix23 Single Path Delay Feedback Architecture“, March 16th, The 10th LSI Design Contest in Okinawa 2007. Perform “Special Feature Award”. Published in Design Wave Magazine-Japan.
  26. Supervisor of ITB Student Arjuna Team, A. Tumewu, P. Banjarnahor, A. Parsaoran, “2D Product Code Iterative Decoder Implementation”, March 17th 2006, The 9thLSI Design Contest in Okinawa 2006. Perform Special Feature Award”. Published in Design Wave Magazine-Japan .
  27. Received the “Second Japan Intellectual Property (IP) Award 2000”, Sponsored by Nikkei BP. Design Title: “Low Bit-rate Video Communication LSI Design”.
  28. Cum Laude in Master Degree Achievement (1996)
Patents
  1. Akses Point Nirkabel Sekali Sentuh Berbasis Serah Terima Near Field Communication (NFC), Patent Pending No : P00201407617.
  2. Japan Patent: “High Quality Video Compression System”, Patent No: 2000-361681, Date 28 November 2000.
  3. LTE Framework, No : 073348 (HAKI)
Publications

Journals:

  1. Trio Adiono, Rian Ferdian, Febri Dawani, Imran Abdurrahman, Rachmad Vidya Wicaksana Putra, Nur Ahmadi, “An Inter-Processor Communication (IPC) Data Sharing Architecture in Heterogeneous MPSoC for OFDMA”, J. ICT Res. Appl., Vol. 12, No. 1, 2018, 70-86, http://dx.doi.org/10.5614%2Fitbj.ict.res.appl.2018.12.1.5.
  2. Adiono, S. Fuada, and R.A. Saputro, “Rapid Development of System-on-Chip (SoC) for Network-Enabled Visible Light Communications,”  Int. J. of Recent Contributions from Engineering, Science, and IT (iJES).
  3. Adiono, A. Pradana, and S. Fuada, “A Low-complexity of VLC System using BPSK,” Int. J. of Recent Contributions from Engineering, Science, and IT (iJES), Vol. 6 No. 1 ,2018.
  4. Fuada, T. Adiono, R.V.W. Putra, “Noise and Bandwidth Consideration in Designing Op-Amp Based Transimpedance Amplifier for VLC,”Accepted in Bulleting Electrical Engineering and Informatics, SCOPUS INDEXED.
  5. Fuada, A.P. Putra, Y. Aska, and T. Adiono, “Noise Analysis of Trans-impedance Amplifier (TIA) in Variety Op Amp for use in Visible Light Communication (VLC) System,” International Journal of Electrical and Computer Engineering (IJECE), Vol. 8(1), 2018.
  6. Fuada, T. Adiono T, A.P. Putra, Y. Aska, “LED Driver Design for Indoor Lighting and Low-rate Data Transmission Purpose, Optik-Int. J. for Light and Electron Optics, Vol. 156, pp. 847-856, 2017, DOI: https://doi.org/10.1016/j.ijleo.2017.11.180.
  7. Adiono, Y. Aska, S. Fuada, A.A. Purwita, “Design of an OFDM System for VLC with a Viterbi Decoder,” IEIE Transaction on Smart Processing and Computing (SPC), Vol. 6(6), pp. 455-465, December 2017. DOI: https://doi.org/10.5573/IEIESPC.2017.6.6.455.
  8. Adiono, Y. Aska, A.A. Purwita, S. Fuada, A.P. Putra, “Modeling OFDM system with Viterbi Decoder for Visible Light Communication,” IEIE Transaction on Smart Processing and Computing (SPC), IEIE. ISSN: 2287-5255.
  9. Adiono, M. Lutfi, R.A. Saputro, S. Fuada “MAC Layer Design for Network-Enabled Visible Light Communication Systems Compliant with IEEE 802.15.7,” Journal Energy Web And Information Technologies.
  10. Fuada, A.P. Putra, and T. Adiono, “Analysis of Received Power Characteristics of Commercial Photodiodes in Indoor LoS Channel Visible Light Communication,” Int. J. Of Advanced Computer Science and Applications (IJACSA), Vol. 8(7), July 2017. DOI: 10.14569/IJACSA.2017.080722.
  11. Adiono, A.Z. Ramdani, R.V.W. Putra. “An Optimal Architecture of Reversed-Trellis Tail-Biting Convolutional Code Decoder for LTE,” International Journal of Electrical and Computer Engineering (IJECE), IAES. ISSN: 2088-8708.
  12. Fuada, A.P. Putra, Y. Aska, T. Adiono, “Noise Analysis of Trans-impedance Amplifier (TIA) in Variety Op Amp for use in Visible Light Communication (VLC) System,” International Journal of Electrical and Computer Engineering (IJECE), IAES. ISSN: 2088-8708.
  13. Fuada, T. Adiono, A.P. Putra, and Y. Aska, “Noise Analysis in VLC Optical Link based Discrette OP-AMP Trans-Impedance Amplifier (TIA),” Jurnal of TELKOMNIKA, Vol. 15(3), September 2017. DOI: http://dx.doi.org/10.12928/telkomnika.v15i3.5737. ISSN: 1693-6930.
  14. Fuada, A.P. Putra, Y. Aska, T. Adiono, “A First Approach to Design Mobility Function and Noise Filter in VLC System Utilizing Low-cost Analog Circuits,” International Journal of Recent Contributions from Engineering, Science & IT (i-JES), IAOE. eISSN: 2197-8581.
  15. Trio Adiono, Amy Hamidah Salman, Yusuf Purna Yudhanto, Nur Ahmadi, Suksmandhira Harimurti, “Highly stable analog front-end design for NFC smart card”, Analog Integrated Circuits and Signal Processing, pp. 1-9, ISSN: 0925-1030, DOI: 10.1007/s10470-017-0978-3.
  16. Adiono, A. Pradana, R.V.W. Putra, W.A. Cahyadi, & Yeon Ho Chung, “Physical Layer Design with Analog Front End for Bidirectional DCO-OFDM Visible Light Communications,” SPIE – Optical Engineering.
  17. Fadjar Rahino Triputra, Bambang Riyanto Trilaksono, Trio Adiono, Rianto Adhy Sasongko , “Visual Servoing of Fixed-Wing Unmanned Aerial Vehicle Using Command Filtered Backstepping”, International Journal of Electrical and Computer Engineering (IJECE).
  18. Adiono, R.V.W. Putra, B.L. Lawu, K. Afifah, M.H. Santriaji, & S. Fuada “Rapid Prototyping Methodology of Lightweight Electronic Drivers for Smart Home Appliances,” International Journal of Electrical and Computer Engineering, vol. 6, no. 5, October 2016.
  19. V.W. Putra & T. Adiono“VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm”. Journal of ICT Research and Applications (JICTRA), 2016. (ISSN: 2337-5787, E-ISSN: 2338-5499).
  20. V.W. Putra & T. Adiono“Hybrid Multi-System-on-Chip Architecture as a Rapid Development Approach for a High-Flexibility System”. IEIE Transactions on Smart Processing and Computing (IEIE-SPC), Vol. 5 No. 1, February 2016. (ISSN: 2287-5255) (http://dx.doi.org/10.5573/IEIESPC.2016.5.1.55).
  21. Trio Adiono, Aditya F. Ardyanto, Nur Ahmadi, Idham Hafizh, and Septian G. P. Putra, “An SoC Architecture for Real-Time Noise Cancellation System Using Variable Speech PDF Method,” International Journal of Electrical and Computer Engineering (IJECE), Vol. 5, No. 5, October 2015, ISSN: 2088-8708, 1-11.
  22. Fadjar Rahino Triputra, Bambang Riyanto Trilaksono, Trio Adiono, Rianto Adhy Sasongko, Mohamad Dahsyat, “Nonlinear Dynamic Modeling of a Fixed-Wing Unmanned Aerial Vehicle : A Case Study of Wulung”, Journal of Mechatronics. Electrical Power, and Vehicular Technology, Vol 06, 2015, 19-30. E-ISSN : 2088-6985, p-ISSN : 2087-3379.
  23. Triputra, F. R., Trilaksono, B. R., Adiono, T., Sasongko, R. A., dan Dashyat, M. (2015): “A Non Linear CameraGimbal Visual Servoing Using Command Filtered Backstepping”, Journal of Unmanned System Technology (JUST), 3, No. 2.
  24. V. W. Putra, R. Mareta, N. Anbarsanti, T. Adiono, “A New RTL Design Approach for a DCT/IDCT-Based Image Compression Architecture Using the mCBE Algorithm“, ITB J. ICT, Vol. 6, No. 2, 2012, 131-150. (ISSN: 1978-3086) (http://dx.doi.org/10.5614/itbj.ict.2012.6.2.3)
  25. Galih, T. Adiono, A. Kurniawan “Low Complexity MMSE Channel Estimation by Weight Matrix Elements Sampling for Downlink OFDMA Mobile WiMAX System”, IJCSNS International Journal of Computer Science and Network Security , February 2010.
  26. Adiono, H. G. Kerkhoff, H. Kunieda, “An Infrastructural IP for Interactive MPEG-4 SoC Functional Verification”, ITB J. ICT Vol. 3, No. 1, 2009, 51-66.
  27. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono, A. Kurniawan, “ A Comparative Study of Channel Estimation Based on Symbol Source of Pilot for Downlink OFDMA System on IEEE 802.16e Standard”, Jurnal Penelitian dan Pengembangan telekomunikasi (JurTel IT Telkom) Vol. 14 no. 1 Juni 2009.
  28. Honsawek, K. Ito, T. Ohtsuka, T. Isshiki, D. Li, T. Adiono, H. Kunieda, “System-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Application,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences. Vol.E84-A No.11, pp.2614-2622.
  29. Adiono, T. Isshiki, K. Ito, D. Li, C. Honsawek, H. Kunieda., “New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec,” IEICE Trans. Fundamentals, VOL.E85-A, No.6 June 2002. pp.1396-1407.

National Journals:

  1. Adiono, R.V.W. Putra, M.Y. Fathany, & W. Adijarto. “Design of Smart Home System Based on Mesh Topology and Efficient Wireless Sensor Network Protocol”.Jurnal Informatika, Sistem Kendali, dan Komputer (INKOM). 2016.
  2. Fuada, T. Adiono, A.P. Putra, Y. Aska, “Desain Awal Analog Front-End (AFE) Optical Transceiver untuk aplikasi Visible Light Communication (VLC),” J. Nasional Teknik Elektro dan Teknik Informatika (JNTETI) UGM.
  3. Fuada, and T. Adiono, “Rancang Bangun Layer Fisik Visible Light Communication Pada Sistem Transmisi Audio,” J. INFOTEL, Vol. 9(3), August 2017. doi: https://doi.org/10.20895/infotel.v9i3.288. ISSN 2460-0997
  4. Adiono, S. Fuada, and A. Pradana, “Desain dan Realisasi Sistem Komunikasi Cahaya Tampak untuk Streaming Teks berbasis PWM,” J. Setrum, Vol. 6(2), pp. 270-279, Desember 2017.
  5. Fuada, A.P. Putra, Y. Aska, A. Pradana, E. Setiawan, and T. Adiono“Implementasi Perangkat Digital Signal Processing untuk Sistem Komunikasi Cahaya Tampak,” Accepted in JETRI, Publish pada VOL. 1 NO. 2 FEBRUARI 2018.
Conference Papers
  1. Trio Adiono, Syifaul Fuada, Rosmianto Aji Saputro, and Muhamad Luthfi,”Internet Access over Visible Light”, IEEE/IEIE ICCE-Asia 2018, June 24-June 26, Jeju, Korea, 2018.
  2. Trio Adiono*, Suksmandhira Harimurti, Billy Austen Manangkalangi, Waskita Adijarto,”Design of Smart Home Mobile Application with High Security and Automatic Features”, The 3rd International Conference on Intelligent Green Building and Smart Grid (IGBSG), April 22-25, 2018, Yilan, Taiwan.
  3. Trio Adiono, Maulana Yusuf Fathany, Syifaul Fuada, Irfan Gani Purwanda, Sinantya Feranti Anindya,”A Portable Node of Humidity and Temperature Sensor for Indoor Environment Monitoring”, The 3rd International Conference on Intelligent Green Building and Smart Grid (IGBSG), April 22-25, 2018, Yilan, Taiwan.
  4. Adiono, S. Fuada, and S. Harimurti, “Bandwidth Budget Analysis for Visible Light Communication Systems utilizing Commercially Available Components,” In the 10th Int. Conf.on Electrical and Electronics Engineering (ELECO), Turkey, November 30-December 2, 2017.
  5. Adiono, K. Afifah, S. Harimurti, and A.H. Salman, “Design of Multi Bitrates and Efficient Power Consumption of Demodulator Circuit for 13.56 MHz Contactless Smart Card Tag IC,” 10th International Conference on Electrical and Electronics Engineering (ELECO), Turkey, November 30-December 2, 2017.
  6. Adiono, T. dan Fuada, S. (2017): “Investigation of Optical Interference Noise Characteristics in Visible Light Communication System,” The 2017 International Symposium on Nonlinear Theory and Its Applications (NOLTA), Cancun, Mexico, Research Society of Nonlinear Theory and Its Applications (IEICE), December, 2017.
  7. Adiono, T. dan Fuada, S. (2017): “Optical Interference Noise Filtering over Visible Light Communication System utilizing Analog High-Pass Filter Circuit,” The 2017 International Symposium on Nonlinear Theory and Its Applications (NOLTA), Cancun, Mexico, Research Society of Nonlinear Theory and Its Applications (IEICE), December, 2017.
  8. Adiono, R.M. Rahayu, A.A. Fadila, “SoC FPGA Prototype for Multi IoT Application,” 2017 International Conference On Electrical Engineering And Informatics (ICEEI), Malaysia. November, 2017.
  9. Adiono, R.M. Rahayu, “Zigbee Baseband Hardware Modeling for Internet of Things IEEE 802.15.4 Compliance,” 2017 International Conference On Electrical Engineering And Informatics (ICEEI), Malaysia, November, 2017.
  10. Adiono, S. Harimurti, G. Meliola, “Design and Simulation of Hafnium Dioxide based Charge Trapping Flash Memory Device,” 2017 International Conference On Electrical Engineering And Informatics (ICEEI), Malaysia, November, 2017.
  11. Adiono, Prasetiyo, S. Harimurti, K. Afifah, A. H. Salman, “Design of Highly Stable Bandgap Reference Circuit for RF Power Harvester Module of a 13.56 MHz Smart Card Tag IC,” 2017 14th International SoC Design Conference (ISOCC), Seoul, South Korea, November, 2017.
  12. Adiono, A. P. Putra “Hardware/Software Model of DCO-OFDM based Visible Light Communication SoC using DMA,” 2017 14th International SoC Design Conference (ISOCC), Seoul, South Korea, November, 2017.
  13. Adiono , H. Ega, H. Kasan,  S. Harimurti, ”Full Custom Design of Adaptable Montgomery Modular Multiplier for Asymmetric RSA Cryptosystem”, 2017 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), Xiamen, China, November, 2017.
  14. Fuada, A.P. Putra, and T. Adiono, “Short-range Audio Transfer through 3 Watt White LED based on LOS Channels,” Int. Conf. on Intellegent Signal Processing and Communication Systems (ISPACS), Xiamen, China, November 2017.
  15. Adiono, R. Marthensa, R. Muttaqin, M.Y. Fathany, S. Harimurti, W. Adijarto, “Design of Database and Secure Communication Protocols for an Internet-of-Things-based Smart Home System”, The 2017 IEEE Region 10 Conference (TENCON), Penang, Malaysia, November, 2017.
  16. Adiono, B. Tandiawan, M.Y. Fathany, W. Adijarto, and S. Fuada, “Prototyping Design of IR Remote Controller for Smart Home Applications,” IEEE TENCON 2017, Malaysia, 2017.
  17. Adiono, S. Fuada, and R.A. Saputro, “Automatic Gain Control Circuit for Mobility Visible Light Communication System using LM13700,” Int. Conf. on IEEE ISESD 2017, Yogyakarta, Indonesia, October 2017.
  18. Adiono, B.A. Manangkalangi, S. Harimurti, R. Muttaqin, W. Adijarto, “Software of Intelligence and Security System Design for IoT-Based Smart Home,” 2017 IEEE 6th Global Conference on Consumer Electronics (GCCE 2017), Nagoya, Japan, October 24-27, 2017.
  19. Adiono, H. Ega, H. Kasan, Carrel, S. Harimurti, “Fast Warehouse nagement System (WMS) using RFID Based Goods Locator System,” 2017 IEEE 6th Global Conference on Consumer Electronics (GCCE 2017), Nagoya, Japan, October 24-27, 2017.
  20. G. Purwanda, T. Adiono, S. Situmorang, F. Dawani, H.A. Samhany, and S. Fuada, “Prototyping Design of Low-Cost Bike Sharing System for Smart City Application,” IEEE Int. Conf. of ICT for Smart Society 2017, Tanggerang, Indonesia, September, 2017.
  21. Adiono, Carrel, F. and, I. Hariadi, “Portable RFID Reader Design and Implementation for Warehouse Asset Management,” 2017 International Workshop on Smart Info-Media Systems in Asia (SISA 2017), Fukuoka, Japan, September, 2017.
  22. Trio Adiono, Yulian Aska, Ardimas Andi Purwita, Syifaul Fuada, Angga Pratama Putra, “Modeling OFDM system with Viterbi Decoder Based Visible Light Communication,” The International Conference on Electronics, Information and Communication, ICEIC, Phuket, Thailand, January 12-13, 2017.
  23. Trio Adiono, Khilda Afifah, Suksmandhira Harimurti , Prasetiyo, Amy Hamidah Salman, “Design of Low Power Clock Extractor Circuit for 13.56 MHz Contactless Smart Card Tag”, The International Conference on Electronics, Information and Communication, ICEIC, Phuket, Thailand, January 12-13, 2017.
  24. Syifaul Fuada, Trio Adiono, Yulian Aska, Angga Pratama Putra, “Proposed A New Analog Front-End Transceiver Design for OFDM Visible Light Communication,” 2016 IEEE International Symposium on Electronics and Smart Devices, ISESD, November 29–30, 2016, Bandung, Indonesia.
  25. Angga Putra, Syifaul Fuada, Yulian Aska, Trio Adiono, ”System-on-Chip Architecture for High-Speed Data Acquisition in Visible Light Communication System”, 2016 IEEE International Symposium on Electronics and Smart Devices, ISESD, November 29–30, 2016, Bandung, Indonesia.
  26. Radhian Ferel Armansyah, Fadhli Dzil Ikram, Swizya Satira Nolika, Trio Adiono, “Efficient Sound-Source Localization System using Low Cost TDOA Computation,” 2016 IEEE International Symposium on Electronics and Smart Devices, ISESD, November 29–30, 2016, Bandung, Indonesia.
  27. Khilda Afifah, Syifaul Fuada, Rachmad Vidya Wicaksana Putra, Trio Adiono, Maulana Yusuf Fathany, “Design of Low Power Mobile Application for Smart Home”, ISESD 2016 IEEE International Symposium on Electronics and Smart Devices, November 29–30, 2016, Bandung, Indonesia.
  28. Adiono, R.F. Armansyah, S.S. Nolika, F.D. Ikram, R.V.W. Putra, A.H. Salman, “Visible Light Communication System for Wearable Patient Monitoring Device,” 2016 IEEE TENCON, November, 2016, Singapore.
  29. Adiono, H. Herdian, S. Harimurti, “Full-Custom Design Implementation of Serial Radix-4 8-bit Booth Multiplier,” The 2nd International Conference on Electrical Engineering and Computer Science (ICEECS), October 28-29, 2016, Taipei, Taiwan.
  30. Adiono, A. Pradana, R. Vidya Wicaksana Putra, Y. Aska, “Experimental Evaluation for PWM and OFDM Based Visible Light Communication”, The 2nd International Conference on Electrical Engineering and Computer Science (ICEECS), October 28-29, 2016 in Taipei, Taiwan.
  31. Radhian Ferel Armansyah, Swizya Satira Nolika, Nadia Dewanti, Tati L.R. Mengko, Rachmad Vidya Wicaksana Putra, Trio Adiono, “A Facial Expression Recognition Method using Morphological Operation and Fuzzy Classification,” The 2nd International Conference on Electrical Engineering and Computer Science (ICEECS), Taipei, Taiwan, 2016.
  32. Adiono, M.D. Adhinata, N. Prihatiningrum, R. Disastra, R.V.W. Putra, A.H. Salman, “An Architecture Design of SAD Based Template Matching for Fast Queue Counter in FPGA,” 2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), Phuket, Thailand, 2016.
  33. Adiono, R.F. Armansyah, F.D. Ikram, S.S. Nolika, R.V.W. Putra, A.H. Salman, “Parallel Morphological Template Matching Design for Human Detection Application,” 2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), Phuket, Thailand, 2016.
  34. Prasetiyo, R.V.W. Putra, Adiono, A.H. Salman, “Kurtosis and Energy Based Spectrum Detection for SDR Based RF Monitoring System,” 2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), at Phuket, Thailand, 2016.
  35. Trio Adiono, Tengku Ahmad Madya Putra, Suksmandhira Harimurti,”Comparative Study of Control Signal Distribution Improvement Methods in the Timing Performance and Area Consumption of Booth Multiplier“, 2016 Regional Conference on Computer and Information Engineering (RCCIE), October 3-4, 2016, Yangon, Myanmar.
  36. Adiono, M.Y. Fathany, R.V.W Putra, K. Afifah, M.H. santraji, B.L. Lawu, & S. Fuada, “Live Demonstration : MINDS – Meshed and Internet Networked Devices System for Smart Home,” 2016 13th IEEE Asia Pasific Conference on Circuits and Systems (APCCAS) at Jeju, South Korea, October 2016
  37. Adiono, A. Pradana, R.V.W. Putra, & S. Fuada “Analog Filters Design in VLC Analog Front-End Receiver for Reducing Indoor Ambient Light Noise,” 2016 13th IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Jeju, South Korea, October 2016.
  38. Fuada, T. Adiono, A.P. Putra, Y. Aska, “The Design Transimpedance Amplifier (TIA) for Visible Light Communications (VLC),“ The 3rd International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE 2016)
  39. Adiono, M.Y. Fathany, B.L. Lawu, K. Afifah, R.V.W. Putra, & S. Fuada, ”Prototyping Design of Electronic End-Devices for Smart Home Application,” The IEEE Region 10 Symposium (TENSYMP), Bali, Indonesia, May 2016.
  40. L. Lawu, M.Y. Fathany, K. Afifah, R.V.W. Putra, S. Fuada, T. Adiono, “Prototyping Design of Mechanical Based End-Devices for Smart Home Application,” The 4thInternational Conference on Information and Communication Technology (ICoICT), Bandung, Indonesia. May 2016.
  41. V. W. Putra, T. Adiono, “Hybrid Multi System-on-Chip Architecture: A Rapid Development Design for High-Flexibility System,” The 2016 International Conference on Electronics, Information, and Communication (ICEIC), Danang, Vietnam, January, 2016.
  42. Y. Fathany, T. Adiono, “Wireless Protocol Design for Smart Home on Mesh Wireless Sensor Network,” IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 9-12 November 2015, Bali, Indonesia.
  43. V. W. Putra, T. Adiono“Optimized Hardware Algorithm for Integer Cube Root Calculation and Its Efficient Architecture,” IEEE International Symposium on Intelligent Signal Processing and Communication Systems, November 9-12, 2015, Bali, Indonesia
  44. Z. Ramdani, T. Adiono“A Novel Algorithm of Tail Biting Convolutional Code Decoder for Low Cost Hardware Implementation”, IEEE International Symposium on Intelligent Signal Processing and Communication Systems, October 9-12, 2015, Bali, Indonesia.
  45. Sumarudin , T. Adiono , “The Design of High Throughput WiFi Mesh Networked Wireless Sensor Network Using OLSR Protocol”, 2015 International Conference on Automation, Cognitive Science, Optics, Micro Electro-Mechanical System, and Information Technology (ICACOMIT), Bandung, 29-30 Oct. 2015. Print ISBN:978-1-4673-7407-1.
  46. Kurniawan, N. Ahmadi and T. Adiono“Architecture and FPGA Implementation of LTE PSS and SSS Synchronizer”, IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 9-12 November 2015, Bali, Indonesia. (to be publish) 
  47. A. Cahyadi, Tong-Il Jeong,, Yong-Hyeon Kim, Yeon-Ho Chung, T. Adiono, “Patient Monitoring Using Visible Light Uplink Data Transmission”, IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 9-12 November 2015, Bali, Indonesia
  48. Pradana, N. Ahmadi, T. Adiono, W. A. Cahyadi and Y. H. Chung, ”VLC Physical Layer Design Based on Pulse Position Modulation (PPM) for Stable Illumination”,IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 9-12 November 2015, Bali, Indonesia. (to be publish)
  49. Hanindhito, N. Ahmadi, H. Hogantara, A. I. Arrahmah and T. Adiono“Ultrasonic Sensor Based Contactless Theremin Using Pipelined CORDIC as Tone Generator”, IEEE International Symposium on Intelligent Signal Processing and Communication Systems, 9-12 November 2015, Bali, Indonesia.
  50. Z. Ramdani, T. Adiono,“Tail Biting Convolutional Code Decoder Co-processor for High Throughput System-on-Chip”, The 12thInternational SoC Design Conference, November 2-5, 2015, Gyeongju, Korea.
  51. Adiono, R. Ferdian, N. Ahmadi, F. Dawani and I. Abdurrahman, “Flexible Data Sharing Architecture of WiMAX Heterogeneous Multiprocessor System on Chip”. The 12th International SoC Design Conference, November 2-5, 2015, Gyeongju, Korea.
  52. R. V. W. Putra, M. Y. Fathany, TAdionoExperimental Studies on Signal Strength Performance of Wireless Sensor Network”, 5th International Workshop on Industrial IT Convergence (WIITC 2015), 6 Nov 2015, Gumi, Korea.
  53. Adiono, F. M. Satria, N. Ahmadi and F. Soewito, “Hardware Architecture of Time Domain LTE Baseband Signal Processor”, IEEE Tencon 2015, 1-4 November 2015, Macau. (to be publish)
  54. Kusumah, D. Cahyadi, G. Kumara, T. Adiono“CORDIC-Based Digital Sound Synthesizer,” IEEE Tencon 2015, 1-4 November 2015, Macau.
  55. Adiono, R. V. W. Putra, M.Y. Fathany, M.A. Wibisono, & W. Adijarto. “Smart Home Platform Based on Optimized Wireless Sensor Network Protocol and Scalable Architecture”.  The 9th International Conference on Telecommunication System, Services, and Applications (TSSA). Bandung, Indonesia, November, 2015.
  56. Pradana, N. Ahmadi and T. Adiono“Design and Implementation of Visible Light Communication System Using Pulse Width Modulation,” IEEE International Conference on Electrical Engineering and Informatics, 10-11 August 2015, Bali, Indonesia.
  57. Adiono, N. Ahmadi, A. P. Renardy, A. A. Fadila and N. Shidqi,“A Pipelined CORDIC Architecture and Its Implementation in All-Digital FM Modulator-Demodulator”,IEEE Asia Symposium on Quality Electronic Design, August 4-5, 2015, Kuala Lumpur, Malaysia.
  58. P. Renardy, N. Ahmadi, A. A. Fadila, N. Shidqi and T. Adiono, “Hardware Implementation of Montgomery Modular Multiplication Algorithm Using Iterative Architecture”, . IEEE International Seminar on Intelligent Technology and Its Applications (ISITIA), May 20-24, Surabaya, Indonesia.
  59. Hanindhito, N. Ahmadi, H. Hogantara, A. I. Arrahmah and T. Adiono, “FPGA Implementation of Modified Serial Montgomery Modular Multiplication for 2048-bit RSA Cryptosystems”, IEEE International Seminar on Intelligent Technology and Its Applications (ISITIA), 20-24 May, Surabaya, Indonesia.
  60. Purwita, T. Adiono, “Experimental Evaluation for Relaying System Allowing Intralink Error“, International ITG Conference Systems, Communication and Coding, Hamburg, Germany, February 2-5, 2015.
  61. Antonius P. Renardy, Nur Ahmadi, Ashbir A. Fadila, Naufal Shidqi, Trio Adiono, “FPGA Implementation of CORDIC Algorithms for Sine and Cosine Generator”, IEEE International Conference on Electrical Engineering and Informatics (ICEEI), August 10 – 11 2015, Bali Indonesia.
  62. Catherine Olivia Sereati, Arwin Datumaya Wahyudi Sumari, Trio Adiono, Adang Suwandi Ahmad, “Study Of Information Fusion Methodology And Knowledge Growing System Algorithm To Design Cognitive Processor”, 14th International Conference on Quality in Research, August 10, 2015, Lombok, ISSN 1411-1284 
  63. Sumarudin, T. Adiono, W. P. Putra, “Flexible and Reconfigurable System on Chip for Wireless Sensor Network”, International Conference on Information Technology System and Innovation, November 26, 2014, Bali, Indonesia.
  64. Z. Ramdhani, M. Rois, T. Adiono“A Real time AMBA Based Audio Coprocessor for System-on-Chip”, International Conference on Electrical Engineering and Computer Science, November 24-25, 2014, Bali, Indonesia.
  65. H. Santriaji, H. Mauludin, D. Surgawiwaha, T. Adiono. “Real-time Implementation of Maximum a Posteriori (MAP) Based Noise Reductions Using Leon 3 System on Chip”, The International Conference on Electrical Engineering and Computer Science, 24-25 November 2014, Bali, Indonesia.
  66. Ahmad Zaky Ramdani and Trio Adiono,”Dynamic States Viterbi Decoder Architecture Based on Systolic Array”, Regional Conference on Computer and Information Engineering (RC-CIE 2014), Yogyakarta, 7 – 8 October 2014. ISBN: 978-602-71396-0-2, p.126-p.129.
  67. Adiono, “Challenges and Opportunities in Designing Internet of Things“, The 1st International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE 2014), Semarang, Indonesia, November 7-8, 2014, Keynote Speaker, ISBN 978-1-4799-6431-4.
  68. Hafizh, A. Ferry, Adiono, “Real-time SoC Architecture and Implementation of Variable Speech PDF based Noise Cancellation System“, The 1st International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE 2014), Semarang, Indonesia, November 7-8, 2014, Keynote Speaker, ISBN 978-1-4799-6431-4.
  69. Silitonga, T. Adiono, I. Wicaksono, “Concept Implementation of Sole Module for Software-based UL Subframe Mapping Method on TDD WiMAX IEEE 802.16e“, The 2014 International Conference on Computer, Control, Informatics and Its Applications, 21-23 October 2014, Bandung, Indonesia. ISBN : 978-1-4799-4576-4.
  70. V. W. Putra, T. Adiono, “A Register-Free and Homogenous Architecture for Square Root Algorithm“, The 2014 International Conference on Computer, Control, Informatics and Its Applications, 21-23 October 2014, Bandung, Indonesia, Pages 70-74, ISBN : 978-1-4799-4576-4.
  71. Wibawa, Bama, I M. W. Nungrat, T. Adiono, “Fully Integrated RF Power Harvester Module for NFC Contact-less SmartCard“, The Joint Conference 4S-2014/AVIC 2014, Ho Chi Minh, Vietnam, October 21-24, 2014, Page 87-92.
  72. V. W. Putra, T. Adiono, “A Configurable and Low Complexity Hard-Decision Viterbi Decoder in VLSI Architecture“, The 2nd International Conference on Information and Communication Technology 2014”, 28-29 May 2014, Bandung, Indonesia.
  73. V. W. Putra, T. Adiono, ” Low Complexity Adaptive Beamforming Power Control with Scheduling Transmit in Wimax “, The 2nd International Conference on Information and Communication Technology 2014”, 28-29 May 2014, Bandung, Indonesia.
  74. Adiono, “An OFDMA PHY System on Chip Design Methodology“, Book: Physics of Semiconductor Devices: 17th International Workshop on the Physics of Semiconductor Devices 2013, Environmental Science and Engineering, Pengarang, V. K. Jain, Abhishek Verma, Penerbit Springer Science & Business Media, 2013, ISBN 3319030027, 9783319030029. Page 925-928.
  75. Septebrina Situmorang, Astrini Kusumawardhani, Trio Adiono“Enabling Simplified LTE ENodeB Development using LTE MATLAB Toolbox”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  76. Erick Adinugraha, Trio Adiono, Yanuar T. Aditya Nugraha, “Optimization and Rapid Development of LTE Implementation on TMS320C6670 DSP using Turbo Encode Coprocessor (TCP3e)”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  77. Yanuar T. Aditya Nugraha, Trio Adiono, Erick Adinugraha, “Enabling Multithreaded Streaming Environment for LTE SDR Proof of Concept using Gigabit Ethernet with POSIX Thread”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  78. Trio Adiono, Andy’es Fourman Duta Akbar Sudirja, “Design and Implementation 1k/2k/4k/8k/16k/32k FFT-IFFT Core for DVB-T 2”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  79. Nana Sutisna, Arif Sasongko, Trio Adiono, “Secure Smartcard Chipset Design”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  80. Andyes Fourman D.A Sudirja, Trio Adiono“New Method Diversity Combining using 6 Ways with Small and Fast Architecture”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  81. Trio Adiono, Rian Ferdian, “FPGA Implementation for Wimax’s Heterogeneous Frequency Multiprocessor System on Chip”, The ICE-ID 2013 IEEE International Conference on Electronics Technology and Industrial Development, October 23, 2013, Nusa Dua Bali, Indonesia, ISBN 978-1-4799-1613-9 (PDF Files), ISBN 978-1-4799-1611-5 (CD).
  82. Adiono, A. A. Purwita, R. Haryadi, R. Mareta, and E. R. Priandana, “A Hardware-Software Co-Design For A Real-Time Spectral Subtraction Based Noise Cancellation System“, 2013 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2013), Okinawa, Japan, November 12-15, 2013, ISBN: 978-1-4673-6360-0.
  83. Adiono, N. Sutisna, “Architecture Design Framework for Flexible and Configurable WiMAX OFDMA Baseband Transceiver“, 2013 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2013), Okinawa, Japan, November 12-15, 2013, Pages 656-661, ISBN: 978-1-4673-6360-0.
  84. F. Kasim, T. Adiono, M. Fahreza, M. F. Zakiy, “Real-time Architecture and FPGA Implementation of Adaptive General Spectral Substraction Method“, The 4thInternational Conference on Electrical Engineering and Informatics, Malaysia, June 24 – 25, 2013, Procedia Technology Volume 11, 2013, Pages 191–198.
  85. F. Kasim, T. Adiono, M. Fahreza, M. F. Zakiy, “FPGA Implementation of Fixed-Point Divider Using Pre-Computed Values“, The 4th International Conference on Electrical Engineering and Informatics, June 24 – 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 206–211.
  86. Firdauzi, K. Wirianto, M. Arijal, Adiono, “Design and Implementation of Real Time Noise Cancellation System Based on Spectral Subtraction Method“, The 4thInternational Conference on Electrical Engineering and Informatics, June 24 – 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 1003–1010.
  87. Adiono, N. SutisnaArchitecture Design of Frequency Domain Processing for Flexible and Re-configurable WiMAX OFDMA Receiver“, The 4th International Conference on Electrical Engineering and Informatics, June 24 – 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 680–688.
  88. Sutisna, T. Adiono, “Hardware-Software Design Partitioning for Flexible and Re-configurable WiMAX OFDMA Physical Layer“, The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.
  89. Mitayani, Adiono, “Timing Synchronization in Downlink LTE 3GPP Synchronization“, The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.
  90. Adiono, R. N Susanti, “Low Complexity Adaptive Beamforming Power Control with Scheduling Transmit in Wimax“, The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.
  91. Dwiyasa, R. Karlina, T. Adiono, “Algorithm and Hardware Architecture of High Accuracy IQ Imbalance Estimation and Compensation for OFDM System“, Proceedings of 2012 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2012), Tamsui, New Taipei City, November 4-7, 2012, ISBN 978-1-4673-5083-9, Pages 669-673.
  92. Adiono, Marvin, “Radix-4 Max-log-MAP Parallel Turbo Decoder Architecture with a New Cache Memory Data Flow for LTE“, Proceedings of 2012 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2012), Tamsui, New Taipei City, November 4-7, 2012, ISBN 978-1-4673-5083-9, Pages 792 – 797.
  93. Mitayani, Adiono, “Synchronizer Design for Downlink Receiver 3GPP LTE“, Proceedings of the 1st International Workshop on Industrial IT Convergence, Bandung, Indonesia, August 28-29, 2012.
  94. A. Cahyadi, T. Adiono, A. H. Salman, Y. Kurniawan, “The SoC Design And FPGA Implementation Of Digital TV Receiver“, The 1st International Workshop on Industrial IT Convergence, Bandung, Indonesia, August 28-29, 2012.
  95. Humala, I. Abdurrahman, G. Ellhasya, T. Adiono, “A Configurable FFT with SPDSR Architecture and 1/8 Twiddle Factor Memory Optimization“, The 1st International Workshop on Industrial IT Convergence, Bandung, Indonesia August 28-29, 2012.
  96. Adiono, K. Adityowibowo, “Design and Real-time Implementation of Layer 3 Ethernet Bridge on Point-to-Point WiMAX“, TSSA, Bali, Indonesia, 2012, ISBN 978-1-4673-4549-1, Pages 1-3.
  97. Salman, T. Adiono, W. A. Cahyadi, Y. Kurniawan, “SoC Design and FPGA Implementation of Digital TV Receiver“, TSSA, Bali, Indonesia, 2012, ISBN 978-1-4673-4549-1, Pages 125-129.
  98. Purwita, T. Adiono, “A Four Quadrants Parallel-Recursive 2-D DCT/IDCT VLSI Architecture“, The 5th International Conference on Emerging Trends in Engineering & Technology (ICETET-12), Himeji-Japan, November 5-7, 2012, ISBN 978-1-4799-0276-7, Pages 233-238.
  99. Ferdian, K. Anwar, T. Adiono, “Efficient Equalization Hardware Architecture for SC-FDMA Systems without Cyclic Prefix“, The 12th IEEE International Symposium on Communications and Information Technologies (ISCIT 2012), October 2-5, 2012, Gold Coast-Australia, ISBN: 978-1-4673-1157-1, Pages 936-941.
  100. Adiono, R. Mareta “Low Latency Parallel-Pipelined Configurable FFT-IFFT 128/256/512/1024/2048 for LTE“, Intelligent and Advanced System (ICIAS 2012), Kuala Lumpur, Malaysia, June 12-14, 2012, ISBN 978-1-4577-1968-4, Pages 768-773.
  101. V. Wicaksana, T. Adiono. “Reconfiguration of OpenSPARC TI 8-Cores Processor to Low-Cost Single-Core Processor“, SITIA 2012, ITS, Surabaya, Indonesia, 2012.
  102. Adiono, F. Dwiyasa, N. Sutisna, H. Achmad, E. Soryawan, F. Dawani, R. Ferdian, “Real-Time WiMAX System on Chip Design, Implementation and Field Test”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.
  103. Sutisna, T. Adiono, “Optimum VLSI Architecture of High Performance Synchronizer for WiMAX OFDMA System”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.
  104. Purwita, T. Adiono, “An Optimized 8-Level Turbo Decoder Algorithm and VLSI Architecture for LTE”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.
  105. Pradini, T. M. Roffi, R. Dirza, Adiono, “VLSI Design of a High-Throughput Discrete Cosine Transform for Image Compression Systems“, 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7, Pages 1-6.
  106. Purwita, A. Setio, T. Adiono, “Optimized 8-Level Turbo Encoder Algorithm and VLSI Architecture for LTE“, 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7, Pages 1-6.
  107. V. W. Putra, R. Mareta, N. Anbarsanti, T. Adiono, “The Efficient mCBE Algorithm and Quantization Numbers for Multiplierless and Low Complexity DCT/IDCT Image Compression Architecture“, The 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7.
  108. Galih, T. Adiono, “Folding Memory Shared Processor Array (FMSPA) Architecture for Channel Estimation of Downlink OFDMA IEEE 802.16e System”, The 6thInternational Symposium on Parallel Computing in Electrical Engineering (PARELEC 2011), Luton, UK, April 3-7, 2011, ISBN 978-1-4577-0078-1, Pages 173-178.
  109. Adiono, A. Prasetiadi, A. Salbiyono, “Efficient Encoding for Hardware Implementation of IRA LDPC on 802.16 Standard“, International Symposium on Intelligent Signal Processing and Communications Systems, Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.
  110. Salbiyono, T. Adiono, “LDPC Decoder Performance under Different Number of Iterations in Mobile WiMAX“, International Symposium on Intelligent Signal Processing and Communications Systems, Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.
  111. Mulyawan, F. Nugroho, R. Novi, F. Dwiyasa, T. Adiono, “Performance Analysis of LLR Combining HARQ for MIMO Systems in Mobile WiMAX”, Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.
  112. Firdaus, I. Prayudi, R.H. Widyalaksono, Adiono, “A High Speed MIPS Processor Architecture with Minimum Flush Rate and Zero Stall“, 3rd AUN/SEED-NET Regional Conference in Electrical and Electronics Engineering: International Conference on System on Chip Design Challenges (ICoSoC 2010). pp. 96-100, Manila, Philippine, September 8-9, 2010.
  113. Kristian, H. Wahyono, K. Rizki, T. Adiono, “Ultra-Fast-Scalable BCH Decoder With Efficient-Extended Fast Chien Search,” 3rd IEEE International Conference on Computer Science and Information Technology (ICCSIT) 2010, vol.4, no., Chengdu, July 9-11, 2010, ISBN 978-1-4244-5537-9, Pages. 338-343.
  114. Ahmadi, M. H. Sirojuddin, A.D. Nandaviri, T. Adiono, “An Optimal Architecture of BCH Decoder,” Application of Information and Communication Technologies (AICT), Tashken, October 12-14, 2010, ISBN 978-1-4244-6903-1.
  115. Adiono, A. Fourman D.A.S, A. H. Salman, “Configurable 2k/4k/8k FFT-IFFT Core for DVB-T and DVB-H”, The 11th Industrial Electronic Seminar 2009 (IES 2009), Surabaya, Indonesia, October 21, 2009.
  116. Salbiyono, R. Purba, R. Mulyawan, A. Wahyu, M. Yusuf, T. Adiono, “CTC Decoder for Mobile WiMAX with HARQ Support”, The 5th International Conference TSSA 2009, Bandung, Indonesia, November 20-21, 2009.
  117. Salbiyono, R. Purba, R. Mulyawan, A. Wahyu, M. Yusuf, T. Adiono, “Double Binary Convolutional Turbo Decoder for DVB RCS“, The 5th International Conference TSSA 2009, Bandung, Indonesia, November 20-21, 2009.
  118. Adiono, “VLSI Education In Institut Teknologi Bandung Indonesia”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 579-582.
  119. Tyson, L. Romas, S. Intan, T. Adiono, “A Pipelined Double-Issue MIPS Based Processor Architecture”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 583-586.
  120. Galih, R. Karlina, A. Irawan, T. Adiono, A. Kurniawan, Iskandar, “Low Complexity Partial Sampled MMSE Channel Estimation for Downlink OFDMA IEEE 802.16e System“, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 162-166.
  121. Salbiyono, T. Adiono, “Preamble Structure-Based Timing Synchronization for IEEE 802.16e”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 319-322.
  122. Galih, R. Karlina, A. Irawan, T. Adiono, A. Kurniawan, “Low Complexity Down-Sampled MMSE (DMMSE) Channel Estimation for Downlink OFDMA IEEE 802.16e System“, The 3rd IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, Beijing, China, October 27-29, 2009, ISBN 978-1-4244-4076-4, Pages 273-277.
  123. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono, A. Kurniawan, “High Mobility Data Symbol Based Channel Estimation for Downlink OFDMA System Based on IEEE 802.16e Standard“, IEEE International Symposium on Communication and Information Technology(ISCIT) 2009, Incheon, Korea , September 28-30, 2009, ISBN 978-1-4244-4521-9, Pages 859-863.
  124. Galih., R. Karlina, F. Nugroho, A. Irawan. T. Adiono, A. Kurniawan, ”Hight Mobility Data Pilot based Channel Estimation for Downlink OFDMA System based on IEEE 802.16e Standard”, 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 478-483.
  125. Heri K., A. B. Nugraha, R. S. Purba, Adiono, ”Very Fast Pipelined RSA Architecture Based on Montgomery’s Algorithm”, 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 491-495.
  126. Adiono, W. A. Cahyadi, A. H. Salman, “DVB-T Synchronizer Architecture Design and Implementation“, 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 594-599.
  127. Adiono, R. S. Purba, “Scalable Pipelined CORDIC Architecture Design for Inverse-CABAC on H.264“, 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2.
  128. Adiono, A. Maria K., A. H. Salman. “VLSI Architecture Design for Inverse-CABAC on H.264 Decoder”, International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 650-653.
  129. Adiono , M. Syafiq, Y. S. Hidayat, A. Irawan, “64-point Fast Efficient FFT Architecture Using Radix-23 Single Path Delay Feedback”, International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 654-658.
  130. Zulkifli, Y.P. Yudhanto, N. A. Soetharyo, T. Adiono. “Reduced Stall MIPS Architecture using Pre-Fetching Accelerator”, International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 611-616.
  131. Adiono, Andjas W., A. R. Novie, “The Future Trend of MIMO Technology in WiMAX”., The First International Workshop on Modern Research Methods in Electrical Engineering IWoRMEE 2009 , Hasanuddin University, Makasar, Indonesia, August 3-6, 2009.
  132. Adiono, “Chipset as Local ICT Industry Enabler”, e-Indonesian Initiative V, Bandung Institute of Technology, Indonesia, June 24-25, 2009.
  133. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono, A. Kurniawan, “High Mobility Data Pilot Based Channel Estimation for Downlink OFDMA System Based on IEEE 802.16e Standard“, ICROS-SiCE International Joint Conference 2009, Fukuoka, Japan, August 18-21,2009.
  134. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono, A. Kurniawan , “A Comparative Study of Interpolation Methods for Channel Estimation Based on Downlink OFDMA IEEE 802.16e Standard“, International Conference on Rural Information and Communication Technology (RICT), Bandung, Indonesia, 2009.
  135. Adiono, F. Dwiyasa, R. Karlina, Irma, A. Irawan, A. Hamidah, “Hardware Modeling of WIMAX Base Band Chip”, International Conference on Rural Information and Communication Technology 2007, (ICT ITB), ISBN : 978-979-15509-I-8.
  136. Adiono, A. Mulyanto, A. Sutanto, “H.264/MPEG-AVC Video Decoder Architecture Design for IPTV“, International Conference on Rural Information and Communication Technology 2007, (ICT, ITB), ISBN : 978-979-15509-I-8.
  137. Setiawan, T. Adiono, A. Kurniawan, “Digital Base Band Signal Processing Design for WCDMA Downlink Communication and The Implementation on FPGA”, International Conference on Instrumentation Communication Communication and Information Technology, FMIPA – ITB Bandung, August 8-9, 2007.
  138. Adiono, A.O. Tamaela, N. Sutisna, “Perancangan dan Implementasi Pipeline RISC Processor Core 32-bit SIEGE32“. Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.
  139. Adiono, A. Tumewu, “Perancangan dan Implementasi USB 1.1. Function IP Core“. Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.
  140. Turyana, Adiono, E. Y. Syamsuddin. “Perancangan Arsitektur Context-based adaptive Binary Arithmetic Coding (CABAC) Encoder untuk Kompresi Video H.264/MPEG4-AVC“, Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.
  141. Adiono, A. Hamidah, T. R. Mengko, “High Performance Tele-Meicine System Design“, BME DAYS 2006, Bandung, Indonesia, November 13 – 15, 2006.
  142. Setiawan, T. Adiono, “Speed-Up Proses Kuantisasi pada MPEG4-AVC/H-264“, Seminar Nasional Teknologi Informasi SNTI 2006, Vol.3 No.1 Tahun 2006 ISSN: 1829-9156, 15 November 2006.
  143. Setiawan, T. Adiono, A. Kurniawan, “Proses Sinkronisasi Frame pada Komunikasi Downlink WCDMA“, Seminar Nasional Riset Teknologi Informasi 2007, di Yogyakarta 9 Juli 2007, Vol. II 2007, ISSN : 1907-3526.
  144. Setiawan, T. Adiono, A. Kurniawan, “Perancangan Pembangkit Kode OVSF untuk Standard Komunikasi Downlink WCDMA“, Seminar Nasional Teknologi Informasi, Universitas  Tarumanegara, Jakarta, Nopember 3, 2007.
  145. Sutanto, D. Fitriyanto, Adiono, “Perancangan Deblocking Filter untuk Aplikasi Kompresi Video Menggunakan Standar MPEG4/H.264,” Konferensi Nasional e-Indonesia Intiative 2006, Bandung, Indonesia, Mei 3-4, 2006.
  146. Sutisna, A. Mulyanto, T. Adiono, “RISC Based 32-Bit Core Processor Design for System on Chip (SoC),” International Seminar on Electrical Power, Electronics, Communication, Control and Informatics, Malang, Indonesia, Mei 16-17, 2006.
  147. Tapilouw, T. Adiono, E. Y. Syamsuddin, “Perancangan dan Implementasi Variable Block Size Motion Estimation dari MPEG4/H.264 CoDec,” International Seminar on Electrical Power, Electronics, Communication, Control and Informatics, Malang, Indonesia, Mei 16-17, 2006.
  148. Adiono, D. Fitriyanto, T. Setiadipura, “Very Low Bit-Rate Tele-Ophthalmology for Rural Area Application”, The Fourth Asia Pacific Telecommunications Telemedicine Workshop 2006, January 25-26, 2006 .
  149. Mulyanto, D. Fitriyanto, T. Adiono, T. R. Mengko, E. Y. Syamsuddin, “32 Bit RISC Processor for Programmable H.264+/MPEG4-AVC Codec”, International Conference on Instrumentation, Communication and Information Technology (ICICI) 2005, Bandung, Indonesia August 3-5, 2005,.
  150. Adiono, D. Fitriyanto, “Pengembangan Industri Design House Rangkaian Terintegrasi (IC) berbasis Lisensi di Indonesia“, Pameran & Seminar SUCP 2005.
  151. Adiono, B. Wijaya, J. Kurniawan, B. Prasetya, “Videophone Terminal for IP Network on TMS3206711 Platform”, International Conference on Instrumentation, Communication and Information Technology (ICICI) 2005, Bandung, Indonesia, August 3-5, 2005.
  152. Adiono, D. Fitriyanto, A. Mulyanto, S. Wisayataksin, K. Takeichi, D. Li, T. L. R. Mengko, H. Kunieda, “New Macroblock Engine Architecture For Video Processing“, MVA2005, Japan, May 16-18, 2005.
  153. Adiono, D. Fitriyanto, A. Mulyanto, “Low Bit-Rate H.263+/MPEG4 Based Videophone Design for empowering Communication Infrastructure“, National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, Indonesia, April 19-20, 2005.
  154. Adiono, D. Fitriyanto, A. Mulyanto, T. R. Mengko, E. Y. Syamsuddin, “H.263+/MPEG 4 Video Phone VLSI Design for Low Bit-Rate Application“, National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, Indonesia, April 19-20, 2005.
  155. Mulyanto, D. Fitriyanto, M. Amien S., Adiono, T. R. Mengko, E. Y. Syamsuddin, “Microprocessor Design For H.263+/MPEG4 Codec“, National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, April 19-20, 2005.
  156. Syafrudin, A. Mulyanto, T. Adiono, H. Kunieda, “Prototyping I2C Bus-base Interface Technology between Video Codec System and HMP8117“, IECI Japan Workshop, 2004,pp.49-53, ISSN 1344 7491.
  157. Adiono, T. Isshiki, D. Li, H. Kunieda. “Efficient Method for Face Region Quality Enhancement in Low Bit Rate Video Coding“. Proceedings of 2002 IEEE Asia Pasific Conference on Circuit and System, <I>, ISBN 0-7803-7690-0, Pages 549 – 553, (2002).
  158. Adiono, T. Isshiki, D. Li, H. Kunieda, “A New Methodology for Low Delay Real-time Videophone Software Architecture Design”. 2002 IEEE Asia Pacific Conference on Circuit and System, <II>, ISBN 0-7803-7690-0, 269 -273, (2002).
  159. Isshiki, C. Honsawek, T. Adiono, K. Ito, T. Ohtsuka, D. Li, H. Kunieda, “H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method”. ISAS-SCI Proceedings of the World Multiconference on Systematics, Cybernetics and Informatics: Information Systems Development-Volume I, 2001, ISBN 980-07-7541-2, Pages 195-200.
  160. Adiono, T. Isshiki, K. Ito, T. Ohtsuka, D. Li, C. Honsawek, H. Kunieda., “Face Focus Coding Under H.263+ Video Coding Standard,” IEEE APCCAS, No.00EX394, pp.461-464, China, Dec.4-6, 2000.
  161. Adiono,”Analysis of ITU-T H.263+ Video Coding Performance in Application to PSTN Network,” The 9th Scientific Meeting Temu Ilmiah TI-IX PPI 2000, Japan.
  162. Honsawek, K. Ito, T. Ohtsuka, T. Isshiki, D. Li, Adiono, H. Kunieda, “System-MSPA Design of H.263+ Video Encoder LSI for Face Focused Videotelephony,” IEEE APCCAS, No.00EX394, Pages 152-155, China, December 4-6, 2000.
  163. Li, Adiono, C. Honsawek, and H. Kunieda, “Multimedia LSI Design Based on Window-MSPA Architecture,” ISPACS’99 Thailand, Pucket, Dec.8-10, 1999 (Invited Paper).
  164. Mengko, T. Adiono, Handoko S., Rini S., Donny, “Design and Implementation of Real-Time System for Object Detection and Classification on Parallel Virtual Machine,” IAPR Workshop on MVA 98, Makuhari, Chiba, Japan, Nov. 17-19, 1998.
  165. Mengko, T. Adiono, Handoko S., Rini S., “Design and Implementation of Object Detection and Classification System Based on Deformable Template Algorithm,” 1998 IEEE Asia Pacific Conference on Circuit and Systems, Microelectronics and Integrated Systems, Chiangmai, Thailand, November 1998.
  166. Suryanto, Y. M. Ariani and T. Adiono, “Fast Image Processor Design Using Five Parallel DSP“, International Conference on Microelectronics, Bandung, Indonesia, 1996.
  167. Suryadarma, T. Adiono, C. Machbub, T.L. R. Mengko “Camera Object Tracking System“, ICICS, Singapore, 1997. Proceedings (ISBN): 0-7803-3676-3.
  168. Adiono, Y. Yanuhardi., T. Mengko, “Design and Implementation of Configurable Binary Template Matching Processor for Morphological and Template Matching Operations,” ICME’96, Bandung, Indonesia, January 1996.
  169. Yanuhardi, T. Adiono, T. Mengko, “TMP5X5T1M : A Configurable Binary Morphological and Template Matching Processor,” Machine Vision Application 96, Tokyo, Japan, November 1996.
  170. Adiono, Rafdian, Indradjit, T. Mengko, “Binary Template Matching Solution to Path Planning Problem,” ACCV’95, Singapore, December 1995.
  171. Rafdian, Adiono, Indradjit, T. Mengko, “Fast Skeleton Operation Using Template Matching Algorithm,” ACCV’95, Singapore, December 1995.
  172. Adiono, Y. Yanuhardi, S. Suroko , T. Mengko, “The Design and Implementation of Binary Template Matching Processor,” International Conference on Microelectronics, Istambul, Turki, September 1994.
Skills
Wireless Communication
DSP
FPGA
Smartcard

Begin typing your search term above and press enter to search. Press ESC to cancel.

Back To Top